| 摘要 |
PURPOSE:To improve the data speed capable of processing and to prevent increase in power consumption by converting a TDMA serial high speed data into a parallel data at a serial conversion circuit, correcting the timing with plural retiming circuits, selecting a data in a data buffer and correcting the error. CONSTITUTION:TDMA serial high speed data 1031,1032 inputted to a serial/ parallel conversion circuit 11 are converted into parallel data 1041-1042n by using a recovered clock 102 recovered in a demodulator, the timing in the device is corrected at retiming circuits 121-12n respectively by using a system clock 101 and the result is inputted to a data buffer 13 by data 1051-1052n. Selected data 1061-1062n are outputted from the data buffer 13 and error correction is implemented by error correction circuits 141-14n respectively and the result is used as data 1071-107n by one port of a ground system. Thus, the processing data speed is improved and the power consumption is reduced. |
