Image sensor with hybrid heterostructure

摘要

An image sensor architecture provides an SNR in excess of 100 dB, without requiring the use of a mechanical shutter. The circuit components for an active pixel sensor array are separated and arranged vertically in at least two different layers in a hybrid chip structure. The top layer is preferably manufactured using a low-noise PMOS manufacturing process, and includes the photodiode and amplifier circuitry for each pixel. A bottom layer is preferably manufactured using a standard CMOS process, and includes the NMOS pixel circuit components and any digital circuitry required for signal processing. By forming the top layer in a PMOS process optimized for forming low-noise pixels, the pixel performance can be greatly improved, compared to using CMOS. In addition, since the digital circuitry is now separated from the imaging circuitry, it can be formed using a standard CMOS process, which has been optimized for circuit speed and manufacturing cost. By combining the two layers into a stacked structure, the top layer (and any intermediate layer(s)) acts to optically shield the lower layer, thereby allowing charge to be stored and shielded without the need for a mechanical shutter.

主权项

1. An image sensor comprising:
a PMOS circuit layer comprising an array of pixel elements;
each pixel element comprising:
a pinned photodiode; andan amplifier, the amplifier comprising P-FET transistors; a CMOS layer comprising supporting pixel circuitry, including a global shutter sample and hold circuit, the supporting pixel circuitry comprising N-FET transistors; wherein the sample and hold circuit comprises a trench capacitor formed in the CMOS layer.