| 摘要 |
A random layout of devices, or at least active regions of devices, is achieved in fabricating semiconductor integrated circuits based on SOI technology using an anti-reflecting film. Windows are opened in the anti-reflecting film at positions corresponding to preselected regions of the semiconductor layer in which corresponding devices are to be formed, thereby to expose at least the surface area of each preselected region corresponding to the active region of the device to be formed therein. For each window, an energy beam substantially uniformly irradiates the exposed surface area including a portion of the anti-reflecting film bordering the window, sufficiently to heat the semiconductor layer and recrystallize the region thereof corresponding to the exposed surface area to a single crystalline form, free of grain boundaries. Self-aligned single crystal regions thus are fabricated in the polycrystalline silicon layer at the respective predetermined device regions. The channel region of an individual IG-FET is formed in each such single crystal region, and source and drain regions are formed within the preselected region, which may include adjacent polysilicon portions, contiguous with and separated by the single crystal region.
|
