发明名称 FAST INTERRUPT MECHANISM FOR A MULTIPROCESSOR SYSTEM
摘要 <p>A fast interrupt mechanism (33) is capable of simultaneously interrupting a community of associated processors (10) in a multiprocessor system. The fast interrupt mechanism (33) enables the more effective debugging of software executing on a multiprocessor system by allowing all of the processors (10) in a community associated with a parallel process to be halted within a limited number of clock cycles following a hardware exception or processor breakpoint. The fast interrupt mechanism (33) consists of a set of registers that are used to identify associations among multiple processors, a comparison matrix (450) that is used to select processors to be interrupted, a network of interconnections that transmit interrupt events to and from the processors, and elements in the processors that create and respond to fast interrupt events.</p>
申请公布号 WO1991020042(A1) 申请公布日期 1991.12.26
申请号 US1991004074 申请日期 1991.06.10
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