| 摘要 |
<p>An integrated-circuit A-to-D converter having repetitive cells which are designed to be matched, but which are subject to uncontrolled mismatches adversely affecting performance. In the disclosed embodiment, the cells (10A-10C) all include resistors (R1 and R2) (of equal ohmic value) carrying currents (designed to be of equal value) producing corresponding output signals (12A1-12C2). To avoid the effects of cell mismatch on the output signals, a network of equal-valued resistors (R2) is added to the circuit, with each network resistor connected between corresponding ends of adjacent pairs of the cell resistors (R1).</p> |
