发明名称 |
ELECTRICALLY ERASABLE PROGRAMMABLE READ-ONLY MEMORY WITH NAND CELL |
摘要 |
An electrically erasable programmable read-only memory has memory cell blocks, each of which has NAND type cell units associated with the bit lines respectively. Each cell unit has a series-circuit of floating gate type memory cell transistors and a selection transistor provided between the corresponding bit line and the series-circuit of memory cell transistors. A row decoder is provided in common to the memory cell blocks, for generating an "H" level voltage which is supplied to a selection gate control line connected to the selection transistor and to a selected word line or lines in a cell unit. A voltage boost circuit is provided for every memory cell block, for causing the "H" level voltage to increase up to a preselected potential level which is high enough to render the cell transistors conductive. The voltage boost circuit includes a first booster section for the selection gate control line, and a second section for the word lines. The second section operates in response to the output voltage of the first section.
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申请公布号 |
US5075890(A) |
申请公布日期 |
1991.12.24 |
申请号 |
US19900516311 |
申请日期 |
1990.04.30 |
申请人 |
KABUSHIKI KAISHA TOSHIBA |
发明人 |
ITOH, YASUO;MOMODOMI, MASAKI;IWATA, YOSHIHISA;TANAKA, TOMOHARU;MASUOKA, FUJIO |
分类号 |
G11C16/08;G11C16/12;G11C16/30 |
主分类号 |
G11C16/08 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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