发明名称 High voltage planar edge termination using a punch-through retarding implant and floating field plates
摘要 A high voltage semiconductor structure having multiple guard rings is provided, wherein an enhancement region, which is of an opposite conductivity type from the guard rings, is formed between the guard rings to increase punch-through voltage between the guard rings. A floating field plate ring is formed over each guard ring, capacitively coupled to each guard ring. Each floating field plate has a flap extending beyond the guard ring in the direction of a main PN junction. The floating field plates serve to reduce parasitic coupling between adjacent guard rings.
申请公布号 US5075739(A) 申请公布日期 1991.12.24
申请号 US19910660485 申请日期 1991.02.26
申请人 MOTOROLA, INC. 发明人 DAVIES, ROBERT B.
分类号 H01L29/06;H01L29/40 主分类号 H01L29/06
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