发明名称 VIRTUAL INSTRUCTION CACHE REFILL ALGORITHM
摘要 An instruction buffer for a digital computer controls the flow of instruction stream to an instruction decoder (32). As each instruction is consumed, a shifter (70) removes the consumed bytes and repositions the remaining bytes into the lowest order positioned. The byte positions left empty are filled by instruction stream bytes retrieved from one of a pair of prefetch buffers (64, 66) or from a virtual instruction cache (28). One prefetch buffer (66) is filled from the instrction cache (28) after being emptied, but prior to those particular bytes being requested to fill the instruction decoder (32). The two-level prefetching allows the relatively slow process of cache access to be performed during noncritical time.
申请公布号 AU5394090(A) 申请公布日期 1991.12.19
申请号 AU19900053940 申请日期 1990.04.27
申请人 DIGITAL EQUIPMENT CORPORATION 发明人 NAME NOT GIVEN
分类号 G06F9/30;G06F9/38 主分类号 G06F9/30
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