发明名称 Electronic multiplier circuit using tetrade adders - has results shift register with single shifting direction and extended interval for formation of product value
摘要 The circuit adds the number part products individually to an overall intermediate product value, the result shift register (5b) having a single shifting direction. The main components of the multiplier circuit comprises tetrad adder stages (2, 3) with a corresp. number of transfer adder circuits (4) providing a parallel addition procedure. Pref. the shift register provides a shift of about four bits for each clock pulse. ADVANTAGE - Prevents error resulting from too short interval for formation of product value.
申请公布号 DE4019398(A1) 申请公布日期 1991.12.19
申请号 DE19904019398 申请日期 1990.06.18
申请人 MERKLE, PAUL, 7032 SINDELFINGEN, DE 发明人 MERKLE, PAUL, 7032 SINDELFINGEN, DE
分类号 G06F7/491;G06F7/52 主分类号 G06F7/491
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