| 摘要 |
<p>A digital-to-analog converter for converting a digital signal having a plurality of binary bits into an analog output signal includes an R-2R ladder network forming a plurality of switching cells corresponding in number to the number of the binary bits. Each switching cell is formed of first, second and third pairs of CMOS transistors defining cross resistances of the ladder network and of a fourth pair of CMOS transistors defining a series resistance of ladder network. A pair of differential circuits drives each switching cell to control switching symmetry and conversion speed.</p> |
