发明名称 PHASE LOCKED LOOP CIRCUIT
摘要 PURPOSE:To vary the characteristic of the phase to the time of the whole of a phase locked loop(PLL) circuit and to improve the following-up characteristic of the PLL circuit by comparing the output signal of a loop filter with a reference signal and controlling the loop filter in accordance with the comparison result. CONSTITUTION:Normally, a switch 12 is closed to stop following-up to peak shift because the output voltage of a loop filter 7 is lower than the reference voltage of a reference power source 1. If the revolution of a motor is varied by omega because of the occurrence of disturbance, a phase error ALPHAtheta between an output signal thetao and an input signal thetai is increased because this output signal does not follow up the quick change, and the output voltage of a loop filter 7 is raised in accordance with this increase. When the output voltage of the loop filter 7 exceeds the reference voltage of a reference power source 13, the switch 12 is opened to quickly follow up the revolution deviation of the motor with a small phase error. Thus, the PLL circuit is obtained where the following-up characteristic to the input signal is improved.
申请公布号 JPH03283821(A) 申请公布日期 1991.12.13
申请号 JP19900083232 申请日期 1990.03.30
申请人 TOSHIBA CORP;TOSHIBA COMPUT ENG CORP 发明人 NAKAJIMA AKIRA
分类号 G11B20/14;H03L7/093 主分类号 G11B20/14
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