| 摘要 |
PURPOSE:To facilitate a long delay time with a high accuracy at the time of reset release by a method wherein, when a power supply voltage exceeds a standard value, reset is held for a predetermined period in accordance with the output transmission signal of an oscillating circuit by a timing control circuit. CONSTITUTION:When a power supply voltage exceeds a standard value, the output of a frequency demultiplying circuit 8 is in a high level for a predetermined period in accordance with the transmission signal of an oscillation circuit 6 and then is turned into a low level. Therefore, a digital circuit 1 is in a reset state for the predetermined period first. After that, a diode D2 is turned off and a transistor Q4 is also turned off. Therefore, the voltage of an output terminal T3 is in a high level and the digital circuit 1 is released from reset. With this constitution, the circuit 1 can be operated after the power supply voltage is sufficiently stabilized. Further, as the delay time of reset release is determined in accordance with the transmission signal of the oscillation circuit 6, a long delay time can be obtained with a high accuracy. |
