发明名称 MANUFACTURE OF HYBRID INTEGRATED CIRCUIT
摘要 <p>PURPOSE:To obtain a highly accurate plating pattern, by a method wherein patterning is applied after depositing a thin conductor layer on an insulating substrate through metallic layers and a plated metallic layer is formed on the conductor layer. CONSTITUTION:A positive type resist 5 is provided on metallic layers formed by consecutively depositing the first metallic layer 2 formed as a resistor, the second metallic layer 3 to obtain close contact, and the third Au layer 4 on an insulating substrate 1. Patterning is applied to the third and the second metallic layers by using the resist 5 as a mask. With exposure development applied by adhering a negative type resist 7 on the first metallic layer 2 and the resist 5, only the resist 7 on the metallic layer 2 is left to expose Au layers 4. Plating 8 is applied on the Au layers 4. A desired gold plated conductor circuit can be obtained by removing the resist 7 and the exposed metallic layer 2. This method forms a plating pattern of high accuracy.</p>
申请公布号 JPS5750459(A) 申请公布日期 1982.03.24
申请号 JP19800126229 申请日期 1980.09.11
申请人 NIPPON DENKI KK 发明人 TACHIKI SHIGEMI
分类号 H01C17/06;H01L21/70;H01L27/01;H05K3/02;H05K3/24 主分类号 H01C17/06
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