发明名称 SINGLE CHIP MICROCOMPUTER
摘要 <p>PURPOSE:To execute the interruption processing at a high speed by releasing temporarily a holding state even against an interruption processing request generated in a holding state and executing immediately the interruption processing. CONSTITUTION:A single chip microcomputer 1 is provided with an external I/F 2 and a clock generating circuit 3, a CPU and a holding control circuit 5, an internal bus 6, a memory 7 and an interruption control circuit 8, and connected to the outside by external terminals T1-T4. In such a state, when the interruption processing is finished, the CPU 4 outputs an interruption processing finish signal 15 to the holding control circuit 5. Also, an interruption request signal 14 is inputted to the bolding control circuit 5 from the interruption control circuit 8, and moreover, when its interruption request signal 14 is high, a holding receiving signal 11 is turned off. In such a way, the interruption processing can be executed at a high speed, and a flexible system can be constituted.</p>
申请公布号 JPH03282686(A) 申请公布日期 1991.12.12
申请号 JP19900082671 申请日期 1990.03.29
申请人 NEC CORP 发明人 OKAMOTO WATARU
分类号 G06F13/34;G06F13/32;G06F15/78 主分类号 G06F13/34
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