| 摘要 |
A semiconductor device with a MOS transistor particularly having a closed layout plan in which the drain region (20) is laterally surrounded by the source region (14) and the channel region (18) and having an extended charge carrier drift region (21) between the channel (18) and drain (20) regions, thereby achieving high reverse breakdown voltage. An oxide or other dielectric layer (22) is provided on the surface of the drift region (21), and on said layer (22) between the gate (24) and drain (28) electrodes a crossover path is formed by a succession of unconnected narrow conductive strips (34,35...) extending transversely to such path and having a dielectric coating thereon. A high voltage external connection bus (36) for the drain electrode (28) traverses such crossover path and extends through a gap formed by a disjuncture in the gate (24) and source (26) electrodes. Since the length of each of the conductive strips (34,35...) greatly exceeds the width of the connection bus (36), the coupling capacitance between each strip (34,35...) and said bus (36) is much less than the coupling capacitance between each strip (34,35...) and the underlying portion of the drift region (21). The drift region (21) can thereby be effectively shielded from the electric field of the connection bus (36) by including a sufficient number of conductive strips (34,35...) in the crossover path traversed by the connection bus (36). |
