发明名称 PLL CIRCUIT
摘要 PURPOSE:To make the loop gain constant with respect to temperature by connecting a collector of transistors(TRs) being components of a differential amplifier to an output of a double balanced differential amplifier. CONSTITUTION:A collector output of a differential amplifier comprising TRs 18, 19 whose two bases are biased through resistors 23, 25 and a variable resistor 24 and whose collectors are used as output terminals connects to an output of a double balanced differential amplifier 27. when a base level difference of the differential amplifier is varied by the variable resistor 24, two output level differences of the double balanced differential amplifier 27 are varied and its level difference is amplified by an amplifier 15 and inputted as a control voltage of a voltage controlled oscillator 16 thereby varying the self-running oscillating frequency. Thus, the loop gain is made constant against temperature.
申请公布号 JPH03280717(A) 申请公布日期 1991.12.11
申请号 JP19900082698 申请日期 1990.03.29
申请人 NEC CORP 发明人 NAKAYAMA ISAO
分类号 H03L7/093 主分类号 H03L7/093
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