发明名称 ROUTING SYSTEM AND METHOD FOR INTEGRATED CIRCUITS
摘要 A system and method for routing interconnections through the layout of an integrated circuit is used in conjunction with a sliceable circuit layout specification that specifies the regions of the layout occupied by circuit components, a specification of the locations of terminals in the layout, and a netlist specifying for each terminal the set of other terminals that are to be connected to it. The regions of the circuit layout not occupied by circuit components are called routing regions. The circuit layout is sequentially sliced, defining a series of rectangular channels, each of which divides a region of the circuit layout containing two or more circuit components into two circuit regions each having at least one circuit component. For each channel, if there are one or more neighboring indented routing regions, a special channel is defined for each such indentation. After the entire routing region is divided into channels and special channels, interconnections are routed through those channels and special channels. In particular, before routing interconnections through each channel, interconnections are routed through the corresponding special channels, if any. A data structure is defined for denoting the sequence in which the channels are defined, the region of the layout occupied by each channel, and for each channel, the region of said layout occupied by each corresponding special channel, if any. The order in which channels are routed corresponds to the sequence in which channels were defined, as denoted in the data structure.
申请公布号 US5072402(A) 申请公布日期 1991.12.10
申请号 US19890419041 申请日期 1989.10.10
申请人 VLSI TECHNOLOGY, INC. 发明人 ASHTAPUTRE, SUNIL V.;MODY, RAJIV C.
分类号 H01L21/82;G06F17/50 主分类号 H01L21/82
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