发明名称 DC COMPENSATION CIRCUIT
摘要 PURPOSE:To attain accurate DC compensation even to an ultrahigh speed signal by detecting a pulse peak and adding a DC voltage in response to the peak value to the input pulse train. CONSTITUTION:The circuit consists of a peak value detection circuit 2 detecting a peak value of a binary input signal whose DC component is cut off, a DC amplifier 3 amplifying an output signal of the peak value detection circuit 2 and a broad band negative feedback amplifier 5 adding an output voltage of the DC amplifier 3 to the input signal and amplifying the result. The broad band negative feedback amplifier 5 takes a form connecting drains of two field effect transistors FET1, FET2 each source connects to ground, an output signal is extracted from drain ends of the two field effect transistors and a negative feedback signal is inputted to a gate of the TR via the feedback circuit 13. Thus, an ideal DC compensation characteristic is easily obtained from an ultrahigh speed pulse signal.
申请公布号 JPH03278646(A) 申请公布日期 1991.12.10
申请号 JP19900080129 申请日期 1990.03.27
申请人 NEC CORP 发明人 TAKANO ISAMU
分类号 H03K5/007;H03K5/00;H04L25/06 主分类号 H03K5/007
代理机构 代理人
主权项
地址