发明名称 INTERLEAVE SYNCHRONIZING CIRCUIT
摘要 PURPOSE:To synchronize an interleave frame and to remove phase indefinition by extracting only an information bit on the reception side, deciding one absolute phase from plural pulled-in phases and synchronizing the interleave frame. CONSTITUTION:A received signal with the phase indefinition is fetched into a demapping means and the information bit corresponding to a pulse for interleave frame synchronization is extracted and equivalently converted to the plural pulled-in phases by an interleave frame synchronization establishing means. Then, an interleave frame synchronizing phase is searched in each phase. In such a case, since the interleave synchronizing frame is discovered in only one absolute phase is the respective pulled-in phases, the interleave frame synchronization is established and the phase indefinition can be removed by detecting the absolute phase.
申请公布号 JPH03274933(A) 申请公布日期 1991.12.05
申请号 JP19900075968 申请日期 1990.03.26
申请人 NIPPON TELEGR & TELEPH CORP <NTT> 发明人 AIKAWA SATOSHI;NAKAMURA YASUHISA
分类号 H04L27/38;H03M13/27;H04J3/06;H04L1/00;H04L7/08 主分类号 H04L27/38
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