发明名称 Network adapter having memories configured as logical FIFOs to transmit and receive packet data.
摘要 <p>Data arranged in packets are transferred between a system memory and a network bus through a SRAM configured by software pointers as first in-first out memories for transmitting (transmit FIFO) and for receiving (receive FIFO). The packets of data stored in the transmit and receive FIFOs are demarked from each other and classified by tag and status bits at the end of the last word of each packet. Data to be transmitted on the network bus is transferred from the system memory to the transit FIFO, and data received from the network is stored in the receive FIFO. To maximize data throughput, when either at least a predetermined amount of data or a complete packet is stored in the transmit FIFO, the data is transmitted to the network while data is being received from the system memory. When at least a predetermined amount of data is stored in the receive FIFO, data is transferred to the system memory while network data is incoming from the network. One application of the invention is in a Fiber Distributed Data Interface (FDDI).</p>
申请公布号 EP0459758(A2) 申请公布日期 1991.12.04
申请号 EP19910304810 申请日期 1991.05.28
申请人 ADVANCED MICRO DEVICES, INC. 发明人 FIROOZMAND, FARZIN
分类号 H04L29/02;H04B10/20;H04L12/42;H04L12/56 主分类号 H04L29/02
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