| 摘要 |
PURPOSE:To set up interleaving synchronism by error correcting syndrome without adding a synchronizing pulse by periodically changing the syndrome for turning all codes to '0' after coding a signal on a transmitting side, and allowing the period to coincide with an interleaving frame. CONSTITUTION:A coding signal inverts the 1st bits in plural blocks, i.e., the 1st block to the (m-1)th block, out of m(=5) blocks in one interleaving frame and inverts the 2nd bit in the m-th block. In the transmitting side, an error correcting coder 10 corrects and codes an input signal, an inversion circuit 12 executes said bit inversion based upon an interleaving synchronizing position pulse outputted from the coder 10 and an interleaver 14 executes interleaving based upon an interleaving synchronizing position pulse outputted from the inversion circuit 12 to transmit an output. On the receiving side, a frame synchronizing circuit 26 sets up synchronism between interleaving and error correction, a deinterleaver executes deinterleaving, an inversion circuit 22 returns bits inverted on the transmitting side to normal bits, and an error correcting demodulator 24 executes error correcting demodulation. |
