发明名称 Visible cache processing.
摘要 <p>An approach that is tailored to a real time processing system receives a set of input samples at each given time interval (frame), and with an IC processor and a relatively small cache memory develops a set of output samples at the same frame interval. The programs that need to be executed in order to develop the output signals are divided into modules that are small enough to fit within the cache memory that is closely associated with the IC processor. All but one of the modules are kept on a host memory and are installed, in sequence, into the cache memory from which they are executed. &lt;IMAGE&gt;</p>
申请公布号 EP0458512(A2) 申请公布日期 1991.11.27
申请号 EP19910304326 申请日期 1991.05.14
申请人 AMERICAN TELEPHONE AND TELEGRAPH COMPANY 发明人 LYNCH, JOHN F., JR.
分类号 G06F9/38;G06F9/445;G06F12/08 主分类号 G06F9/38
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