发明名称 METHOD FOR USING SYNCHRONOUS AND ASYNCHRONOUS SIGNAL PROCESSORS IN PACKET ASSEMBLY/DISASSEMBLY SYSTEM
摘要 The synchronous and the asynchronous processing unit (100,200) are controlled by exclusive microprocessors and a common memory unit is occupied by the units (100,200) to expand the system processing capacity and to increase the communication speed. The method comprises steps: (A) Analyzing an input data from an asynchronous subscriber, checking the ready state of data communication between asynchronous terminals according to the X-28 protocol and sending the control packet and data to a common memory; (B) processing the X.25 control and data packet to transmit a control reply signal and packet data and processing X.29 and X.3 protocol; (C) constructing a packet according to the instruction data and sending to a common memory; and (D) processing input timer data according to X.25, X.3, X.28 protocol. When timer input data is receive.
申请公布号 KR910009671(B1) 申请公布日期 1991.11.25
申请号 KR19880012788 申请日期 1988.09.30
申请人 SAM SUNG ELECTRONICS CO.,LTD. 发明人 HWANG MYUNG-KOO
分类号 H04L12/801;H04L29/06;(IPC1-7):H04L12/56 主分类号 H04L12/801
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