| 摘要 |
PURPOSE:To provide an AGC circuit suitable for the use of a signal processor easy to perform arithmetic processing and of fixed decimal point system by detecting the level of an output signal by converting to an absolute value, and selecting a reference level less than the minimum reception level. CONSTITUTION:A multiplier 30 performs the multiplication of a digital input reception signal by a gain control signal at the AGC circuit 21. The absolute value of the output signal of the AGC circuit 21 that is a multiplication result can be obtained at an absolute value conversion circuit 31, and the output is smoothed at a low-pass filter circuit 32, and the output is subtracted from the reference level at a subtractor 33, then, an error from the reference level is taken out. The error is added on a past error integral value at an adder 34, and an updated error integral value can be obtained, and it is supplied to the multiplier 30 as the gain control signal. Gain memory 35 stores the error integral value from the adder 34, and also, supplies a stored error integral value to the adder 34. The absolute value conversion circuit 31 and the low-pass filter circuit 32 comprise a detecting means for output signal level. The reference level is selected at the level less than the minimum reception signal level to the AGC circuit 21. |
