| 摘要 |
PURPOSE:To generate a pseudo fault in a state near to actual status by using a timer which performs clocking asynchronously with the operating clock of hardware as the generative signal of a pseudo fault signal. CONSTITUTION:A software instruction to instruct the pseudo fault is decoded, thereby generating one of corresponding pseudo fault generation signals 101-10n. The generative signal is inputted to a correspondent circuit out of pseudo fault signal generation circuits 21-2n. After that, when the most significant bit of the timer 1 is inputted to the circuits 21-2n, only the pulses of the pseudo fault signals 201-20n are generated. Then, a correspondent error detection signal out of error signals 401-40n passing a correspondent OR gate out of OR gates 311-31n provided in error detection circuits 31-3n is generated. When the error detection signal is generated, the same state as actual hardware fault can be generated. In such a case, by using the timer 1 which performs the clocking asynchronously with the operating clock of the hardware as a timing signal for the generation of the pseudo fault signal, an error processing test can be performed in a state near to the status where the hardware fault occurs actually. |
