ANALOG/DIGITAL-WANDLER

摘要

The analog-digital conversion circuit of algorithmic type according to the invention comprises a control signal generator (12) intended for receiving a least-significant bit signal (Do) from a shift register (11), a start signal (ST) and a clock signal (CLK) so as to deliver ten switching signals (SS1 to SS10) serving to control the conduction state and the non-conduction state of ten switches (SW11 to SW20) and a locking signal (LA) serving to control the locking of the said shift register, which makes it possible to perform an operation comprising the following five steps: sampling an input signal and a reference voltage signal, comparing the sampled input signal with the sampled reference voltage signal, subtracting or holding, on the basis of the output signal of a comparator, reproducing the subtracted or held signal, and amplifying the reproduced signal. <IMAGE>