发明名称 SPEED DETECTION CIRCUIT
摘要 PURPOSE:To well detect the speed of a spindle motor by respectively measuring the time intervals of one revolution of the spindle motor by the first to N-th counter means to output the same as the first - N-th speed signal. CONSTITUTION:A load signal L1 is generated at the rising point of time of the first cycle of the four-cycle Hall element output signal H3 generated during one revolution of a spindle motor and a counter circuit 62-1 is loaded with an initial value and the subtraction from this initial value is performed by a subtraction clock C21. The clock C21 comes not to generate slightly before the point of time after one revolution of the motor and subtraction is completed in the circuit 62-1. The residual value showing the time interval T1 correspond ing to four cycles remains in the circuit 62-1. The residual value is outputted as a speed error signal S2 through a selection circuit 63, a register 64 and a D/A converter 65. In the same way, the residual value corresponding to four cycles during the next one revolution is measured by a counter circuit 62-2 to output the speed error signal S2. The speed error signal S2 is obtained through counter circuits 62-1 to 62-N.
申请公布号 JPH03261866(A) 申请公布日期 1991.11.21
申请号 JP19900058176 申请日期 1990.03.12
申请人 NEC CORP 发明人 TAKI YOICHIRO
分类号 G01P3/489;G11B19/06;G11B19/28;H02P6/16 主分类号 G01P3/489
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