| 摘要 |
<p>PURPOSE:To alter a clock output waveform with an external control signal by connecting drivers which differ in driving ability in parallel, inputting the same clock to those drivers, and performing exclusive driving among the drivers. CONSTITUTION:A clock generating circuit 1 outputs a source clock signal (a) and a circuit 2 receives this clock and outputs a clock communication signal (b). This circuit 2 is so constituted that the drivers which differ in driving ability are connected in parallel and all the drivers receive the signal (a) from the circuit 1. Then those drivers are constituted logically to drive the signal (b) exclusively and mutually. Consequently, a clock output waveform alternation, i.e. variation of the rising time and falling time of the clock becomes possible according to external signal conditions.</p> |
