| 摘要 |
PURPOSE:To read out defined data successively and at high speed by dividing a ROM into tow or more modules, and supplying a series of acceess sequence to each module individually by delaying time. CONSTITUTION:The ROM is divided into the modules 1-4, and a series of access sequence time A-D are supplied to each of the modules individually and also by delaying the time. Therefore, it is possible to take out the defined data from each module bus to a common bus by a data selector at random. In such a way, real access time can be accelerated compared with the one by the access sequence. |
