| 摘要 |
A power supply reset circuit with a PNP transistor for detecting saturation of an NPN transistor and resetting a fault latch. The PNP and NPN transistors may be separate, discrete components. A preferred embodiment includes a vertical NPN transistor formed in a semiconductor substrate and includes a base, emitter and collector region. The functional, lateral PNP transistor is also fashioned in the semiconductor substrate and has a base region formed by the collector region of the NPN transistor, an emitter region formed by the base region of the NPN transistor, and a distinct, separate collector region disposed in selected proximity to the base and emitter region of the vertical NPN transistor, forming a saturation detector.
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