发明名称 |
Method of making a DRAM cell with stacked trench capacitor |
摘要 |
A semiconductor device and a manufacturing method therefor are disclosed, the semiconductor device including a field oxide layer selectively formed on a semiconductor substrate for defining an active region; an electrically insulated gate electrode; a source and a drain region; a trench formed in the semiconductor substrate; an impurity-doped region formed at the surface of the trench; a first insulating layer; a second conductive layer; a dielectric film; a third conductive layer; a fourth conductive layer; an etch blocking layer; a fifth conductive layer. The manufacturing method comprises a plurality of processes for forming the above mentioned parts by applying various processes. According to the present invention, as both the impurity-doped polycrystalline silicon layer of the upper portion of the transistor and the inside of the trench including the impurity-doped region are simultaneously used as the first electrode of the capacitor, the surface area of the capacitor electrode can be made larger.
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申请公布号 |
US5066608(A) |
申请公布日期 |
1991.11.19 |
申请号 |
US19900494322 |
申请日期 |
1990.03.16 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
KIM, SEONG-TAE;CHOI, SU-HAN;KO, JAE-HONG |
分类号 |
H01L27/04;H01L21/822;H01L21/8242;H01L27/10;H01L27/108 |
主分类号 |
H01L27/04 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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