| 摘要 |
PURPOSE:To shorten an arithmetic processing time by providing an arithmetic result register, a condition code generating circuit, a condition code register, a logical computing element, and an arithmetic mode designating means, then making a condition code based on a result of plural operations obtainable in the condition code register. CONSTITUTION:The device is provided with an arithmetic result register 11, a condition code generating circuit 12, a first and a second condition code registers 13, 15, a logical computing element 14, and an arithmetic mode designating means 16, and constituted to make a condition code based on a result of plural operations obtainable in a second condition code register 15. Accordingly, even in the case a conditional expression such as an 'if' sentence, etc., branches under the condition of a logical arithmetic value of a condition code of plural arithmetic values, respectively, it becomes unnecessary to execute a branch processing whenever the condition code based on each arithmetic value is obtained, and to execute a drawback processing of each condition code. In such a way, the arithmetic processing time can be shortened. |
