发明名称 RESET CIRCUIT FOR DIGITAL SYSTEM
摘要 <p>PURPOSE:To prevent the generation of runaway in a microprocessor or miswriting in a memory by connecting a voltage monitoring IC with a a low operation power supply voltage to the output of the other voltage monitoring IC so that these ICs are used for resetting the microprocessor and turning on/off a power supply for the memory. CONSTITUTION:The voltage monitoring IC 1 is connected to the output of the voltage monitoring IC 2 with the low operation power supply voltage, the node between both the ICs 1, 2 is connected to the reset terminal of the microprocessor 3, a reset line L6 inputted to the chip select (CS) terminals of respective memories 5, a decoding circuit 4 for decoding an address bus L9, and the output lines L8 of the circuit 4 are connected to the other CS terminals of respective memories 5, and the micropocessor 3 and the memories 5 are connected to a data bus L7. When the operation of the IC 1 exceeds the operable voltage point (a) of the processor at the rise of the power supply, a reset signal is outputted. The reset signal is outputted before the IC 2 arrives at the point (a). Thereby, an OR logic between the outputs of the ICs 1, 2 is outputted to the line L6. Since the IC 1 is reset before the operation of the microprocessor 3, the microprocessor 3 can be prevented from generating runaway.</p>
申请公布号 JPH03256108(A) 申请公布日期 1991.11.14
申请号 JP19900053672 申请日期 1990.03.07
申请人 HITACHI LTD 发明人 KASAI SHOJI;HIROSE MASAYUKI;SAKATA KAZUHIRO;SUGIYAMA MASAO
分类号 G06F1/24 主分类号 G06F1/24
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