发明名称 FM RECEPTION ANTENNA OUTPUT SYNTHESIS CIRCUIT
摘要 <p>PURPOSE:To improve the S/N with simple circuit constitution by multiplying plural antenna outputs, extracting a sum frequency component of the multiplied output signal and demodulating the sum frequency component directly or after being frequency-divided as required succedingly. CONSTITUTION:Outputs of 1st and 2nd planer antennas 1, 2 are fed to 1st and 2nd signal processing circuits 3, 4. Both outputs are fed to a multiplier circuit 17 and the sum frequency component is extracted by a band pass filter 18. An output K of the band pass filter 18 is fed to a frequency divider circuit 19. Moreover, an output of the frequency divider circuit is fed to an FM demodulation circuit 16 and the output amplitude is a demodulation component. Thus, in comparison with the case of one channel employing one planer antenna, the S/N is improved by nearly 3dB. Moreover, four planer antennas may be employed and in this case, the S/N is further improved by 3dB, in total 6dB improvement.</p>
申请公布号 JPH03254531(A) 申请公布日期 1991.11.13
申请号 JP19900290443 申请日期 1990.10.26
申请人 CLARION CO LTD 发明人 SAKATA HARUO
分类号 H01Q3/26;H04B7/08 主分类号 H01Q3/26
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