发明名称 |
FLOATING POINT PIPELINE PROCESSOR |
摘要 |
Apparatus and method for providing a floating point pipeline processor wherein selected operations are advanced at least one half clock cycle before other operation. The floating point processor according to the present invention starts the multiplication process half a clock cycle ahead of the arithmetic logic unit instructions, and internal processes are double cycled at twice the processor clock frequency so that all necessary floating point operands are available at the appropriate pipeline process cycle time. |
申请公布号 |
EP0366318(A3) |
申请公布日期 |
1991.11.13 |
申请号 |
EP19890310561 |
申请日期 |
1989.10.13 |
申请人 |
APOLLO COMPUTER INC. |
发明人 |
FLAHIVE, BARRY J.;MANTON, JOHN;KAHAIYAN, MICHAEL |
分类号 |
G06F7/00;G06F7/57;G06F9/30;G06F9/38;(IPC1-7):G06F7/48 |
主分类号 |
G06F7/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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