发明名称 Input/output module with latches.
摘要 <p>An input/output module (10) circuit for providing input/output interface functions in integrated circuits includes an input section and an output section electrically connected to an I/O pad of the integrated circuit. The input section includes an input buffer/level shifter (14) for translating the logic signals from the outside world to CMOS compatible levels. The input buffer may be placed in a high impedance state by a control signal applied to a control input (20). The output (18) of the input buffer/level shifter is connected to a first data input (22) of a two-input multiplexer (24). The output (28) of the two-input multiplexer is connected to an internal bus (32) and to the second data input (26) of the two-input multiplexer. The select input (30) of the two-input multiplexer is connected to a control signal, preferably to the same control signal used to enable the input buffer/level shifter. The output section of the input/output module section of the present invention includes a two-input multiplexer having a first input (44) connected to an internal data bus, and its output (50) fed back to its second data input (48). Its select input (52) is driven from a control signal. The output of the two-input multiplexer is also connected to the input (54) of an HCT buffer (56). The output (58) of the HCT buffer is connected to an I/O pad of the integrated circuit, which may be the same pad to which the input section is connected. The slew input (70) of the HCT buffer is driven from a signal enabling slow or fast rise times. The enable input (60) of the HCT buffer is driven from an enable signal which may be derived from other logic signals. &lt;IMAGE&gt;</p>
申请公布号 EP0456400(A2) 申请公布日期 1991.11.13
申请号 EP19910303917 申请日期 1991.04.30
申请人 ACTEL CORPORATION 发明人 GALBRAITH, DOUGLAS C.;GREENE, JONATHAN W.
分类号 G06F3/00;H03K19/0175 主分类号 G06F3/00
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