摘要 |
PURPOSE:To keep the quality of a converted binary digital signal excellent by providing a band limit filter to the input side of an A/D converter and eliminating an N multiple frequency component to a clock recovered at a clock recovery circuit from a received Wave. CONSTITUTION:Roll-off filters 5I, 5Q minimize the interference between codes of two base band signals I, Q, a transversal equalizer 6 inputs one set of multi- value analog signals I, Q equalizing the waveform of each code to band limit filters 8I, 8Q being interference wave elimination circuits 8. Then the band limit filters 8I, 8Q match the limit frequency of the band limit filters to a multiple of N of the clock frequency to eliminate the N multiple interference component. Then the signal is inputted to A/D converters 1I, 1Q, where the input level of the signal is identified and the signal is converted into a binary digital signal for the identification operation. |