CELL SYNCHRONIZING CIRCUIT

摘要

PURPOSE:To reduce the quantity of hardware in a cyclic redundancy check(CRC) operation circuit by forming plural parallel signals shifted in each bit from a parallel signal obtained by the serial/parallel(S/P) conversion of an input signal and executing the CRC operation of respective parallel signals in parallel. CONSTITUTION:An S/P conversion circuit 1 forms an n-bit parallel signal from an input signal and a delay circuit 2 forms n-bit parallel signals of m groups obtained by shifting the n-bit parallel signal in each bit. Parallel type CRC operation circuits 3-1 to 3-m execute the CRC operation of the n-bit parallel signals in the m groups in parallel in each n bits and coincidence detection circuits 4-1 to 4-m decide whether a pattern to be operated satisfies a CRC rule or not based upon the operated results of the circuits 3-1 to 3-m. Since the CRC operation can be processed by the small number of parallel circuits, the quantity of hardware in the CRC operation circuits can be reduced.