| 摘要 |
PURPOSE:To decrease the number of input ports of a processing circuit of the poststage, in a processing circuit for reading out an address or chapter data from a rotary information recording medium, by outputting a discriminating signal for both of them and a data onto the common line. CONSTITUTION:A data of a rotary information recording medium is demodulated by a demodulator 4, is inputted to a shift register 6 controlled by an output of a clock reproducer 5, and is outputted from its 6 terminals. When an address/chapter discriminating signal is detected by exclusive OR circuits 7a, 7b and an AND gate 8, the shift register 6 is transferred by switching a switch 1 by a flip-flop 9, and an output of the data is obtained from a terminal (5). Subsequently, outputs of the flip-flop 9, and the terminal (5) of the shift register 6 are outputted to one line 15 by use of an AND gate 14. In this way, the number of terminals and the number of input ports of a microprocessor of the post-stage. |
