发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 PURPOSE:To prevent read error from being generated by the existence of a defective memory cell by providing a precharge voltage generating means and plural interrupting means to selectively interrupt connection with each bit line. CONSTITUTION:When a fault is generated in one memory cell out of the memory cells connected to four paired bit lines to be selected by a column decoder 40, a fuse 44 in the column decoder 40 is interrupted. Therefore, since the column decoder 40 outputs signals Y1 and Y2 at a high level, a transistor 15 or 22 is turned off and moreover, a fuse 25 is disconnected as well. As a result, the connection between the bit line, to which the defective memory cell is connected, and a precharge voltage generating circuit 6 is physically interrupted. Thus, the read error can be prevented from being generated by the existence of the defective memory cell.
申请公布号 JPH03245400(A) 申请公布日期 1991.10.31
申请号 JP19900041563 申请日期 1990.02.21
申请人 MITSUBISHI ELECTRIC CORP 发明人 HIRAYAMA KAZUTOSHI
分类号 G11C11/401;G11C11/409;G11C29/00;G11C29/04 主分类号 G11C11/401
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