INTEGRIERTER HALBLEITERSPEICHER.

摘要

The integrated semiconductor memory is divided into a number of identical memory cell fields (ZF) which can be tested by parallel write-in and read-out. The read-out test signals are fed to an integrated evaluation circuit (AS), which responds to a detected fault to bring the respective output into a high ohmic condition. The evaluation circuit (AS) employs a pair of flip-flops coupled via input gates to the data lines (DL) for the respective memory cell fields (ZF).