| 摘要 |
PURPOSE:To shorten time from the start of a sense operation to the external output of data by executing the amplification of potential difference between bit lines, the output of the amplified potential difference from a sense amplifier to a data line and the restorage of the bit line in this order after receiving a start signal by a timing generation circuit. CONSTITUTION:Based on the timing of control signals (a)-(c) to be determined by the constitution of a timing generation circuit 1, the amplification of the potential difference between bit lines 7, the output of the amplified potential difference from a sense amplifier 3 to a data line 5 and the restorage of the bit line 7 is executed in this order. In such a case, since the sense amplifier 2 is connected to the data line 5 when starting the restorage of the bit line 7, the period from the start of the sense operation to the output of the data to the data line 5 can be limited only in the operation time for amplifying the potential difference of the bit line 7 by a pull-down transistor. Thus, the time until the output of the data to the external part can be shortened. |
