SECURE CRYPTOGRAPHIC PROCESSOR ARRANGEMENT

摘要

A secure processor arrangement for a communications secure kernel of a secure processor system. This processor arrangement provides protection of plain text data and suitable isolation of data necessary to support single processor (1) architecture. A red memory subsystem (2,4) stores plain text data and a black memory subsystem (3,5) stores cypher text data. In order to prevent mishandling of plain text data, the single processor (1) is allowed to directly read and to write red memory (4), but the single processor (1) is only permitted to directly read from the black memory (5).