发明名称 MOS type random access memory with interference noise eliminator
摘要 A MOS type random access memory disclosed has a plurality of pairs of sequentially aligned folded type bit lines each of which has a first bit line and a second bit line. Memory cells are arranged at points of intersection between a memory cell word line and the first bit lines. Dummy cells are arranged at points of intersection of a dummy cell word line and the second bit lines. Sense amplifier circuits are connected to the bit line pairs, respectively. In a data read mode of the memory, when a bit data is read from a certain memory cell which is connected to a first word line selected and a first bit line of a selected bit line pair, a second bit line onto which a data voltage is read from a dummy cell of the selected bit line pair is forcedly fixed to a precharge voltage produced by a precharge voltage generator in a presented time interval after the first word line is selected and before a certain sense amplifier circuit connected to the selected bit line pair gets activated, whereby interference noise may be eliminated which is introduced onto the selected bit line pair from a bit line pair adjacent to the selected bit line pair.
申请公布号 US5062079(A) 申请公布日期 1991.10.29
申请号 US19890412930 申请日期 1989.09.26
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 TSUCHIDA, KENJI;OOWAKI, YUKIHITO
分类号 G11C11/4091;G11C11/4097 主分类号 G11C11/4091
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