发明名称 SYSTEM SCANNING-PATH ARCHITECTURE
摘要 PURPOSE: To reduce time for inspecting a system by constituting a device selection module to select one of second scanning lines and to completely bypass the second scanning line of a previously fixed circuit concerning a circuit respectively and previously fixed by a bus master. CONSTITUTION: Each device selection module 18 of a circuit board 16 are constituted to select one of scanning lines 1 to (m) on the circuit board 16 of their each by the bus master 12 or to completely bypass the second scanning line. By selection a second scanning line on a first scanning line or not selecting it, the whole length of the first scanning line can be made in a necessary length so as to include only a necessary scanning line during a specific scanning operation. Time necessary for scanning data through the first and second scanning lines specified by a user is reduced by this performance.
申请公布号 JPH03240851(A) 申请公布日期 1991.10.28
申请号 JP19900211464 申请日期 1990.08.09
申请人 TEXAS INSTR INC <TI> 发明人 RII DEII UETSUTOSERU
分类号 G06F11/22;G01R31/3185;G06F11/273;G06F13/00 主分类号 G06F11/22
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