| 摘要 |
<p>PURPOSE:To transfer data at a high speed by connecting a memory cell to a data holding circuit which latches the data read out of the memory cell with input of an inter-memory transfer command, the address signal, and the read/ write signal respectively. CONSTITUTION:A data holding circuit (latch circuit) 7 having the bit length (word length) equal to that of a memory is provided into a memory chip 13. A new MMT (memory-to-memory transfer) signal is inputted to the chip 13 in an external direct memory access mode together with an address signal ADD, a read/write signal R/W, a data strobe signal STB, and a chip selection signal CS. The input/output of data of the circuit 7 is controlled by a signal.</p> |
