| 摘要 |
<p>PURPOSE:To suppress the frequency of occurrence of an asynchronizing state by digitizing a reproduced MUSE signal via a clamp circuit and detecting a frame pulse when an absolute value of a difference between the output data and a preceding data by a prescribed time is a prescribed value or over. CONSTITUTION:A clamp circuit 2 clamps an average voltage for an HD period of a reproduced MUSE signal to a prescribed reference voltage in response to a clamp timing signal (a). An A/D converter 3 samples an output of the clamp circuit 2 and obtains a digital data in response to the obtained sample. A frame pulse in the reproduced MUSE signal is detected based on the output of A/D conversion and a clamp timing signal is obtained based on the detection output and in the case of decoding of various MUSE signals, a difference between the output data of the A/D converter 3 and a preceding data by a prescribed time is obtained and when the absolute value of the difference is a prescribed value or over, the detection signal is generated and the frame pulse is detected based on the detection signal. Thus, the frequency of occurrence of an asynchronizing state in the synchronizing system is suppressed.</p> |
