发明名称 ADDRESS CIRCUIT
摘要 PURPOSE:To unify address circuits to be connected to the outside to one circuit, and to remove a malfunction by a simple constitution, by counting an address clock positioned between reset signals which are superposed on a data signal, and obtaining an address signal. CONSTITUTION:Data signals D1-D4 on which a reset signal SR and a carry signal SC have been superposed from input terminals 1-4 are supplied to a memory 5, a reset discriminating circuit 6 and a latching circuit 7, respectively. A counter 8 of an address clock is reset whenever the signal SR is detected, and the data signal is synchronized with the address clock. Output signals Q1-Q3 of the counter 8 are supplied to the memory 5 as address signals A1-A3, respectively, and also to a carry discriminating circuit 10. As a result, the lowest rank digit of the address is designated by signals A0-A3, an upper digit than the lowest rank digit is designated by signals A4-A7, and the signals D1-D4 are stored in the prescribed address.
申请公布号 JPS5769577(A) 申请公布日期 1982.04.28
申请号 JP19800144720 申请日期 1980.10.16
申请人 SONY KK 发明人 NAKAOKI YOSHIHIRO
分类号 G06F12/02;G11C8/04;G11C8/18;(IPC1-7):11C8/00 主分类号 G06F12/02
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