发明名称 SEMICONDUCTOR MEMORY
摘要 PURPOSE:To realize a large capacity easily with small area of memory cell by constituting the memory cell of each pair of first and second conductivity type channel transistors in a CMOS gate array and load resistors formed on the gate electrodes of a pair of first conductivity type channel transistors. CONSTITUTION:Unit cell 11 of a CMOS gate array at the memory section of a CMOS gate array is constituted of an N-channel transistor section 12, a P-channel transistor section 13 and a substrate contact section 14, and two memory cells 15 are constituted with same area as single unit cell 11. Transistors 21, 22 for driving a flip-flop 20 are constituted of N-channel transistors, load resistors 31, 32 are formed on the gate electrodes 22a, 21a, and transistors 23, 24 are constituted of P-channel transistors.
申请公布号 JPH03234059(A) 申请公布日期 1991.10.18
申请号 JP19900030918 申请日期 1990.02.09
申请人 SONY CORP 发明人 HIRAYAMA TERUMINE
分类号 H01L27/118;H01L21/82;H01L21/8244;H01L27/11 主分类号 H01L27/118
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