发明名称 MOS TYPE SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 On the surface area of the N type semiconductor substrate (11) the P<+> type source and drain regions (15) are provided. On the substrate surface between the above-mentioned source and drain regions (15), the gate electrode (13) is provided. On the side wall of the above-mentioned gate electrode (13), the CVD oxide film (14) is provided. The source and drain electrodes (19) are formed via contact holes (18) to make contact with the respective surfaces of the above-mentioned source and drain regions (15). The silicone nitride film (16) is formed on the substrate surface except the above-mentioned contact holes (18). <IMAGE>
申请公布号 EP0441392(A3) 申请公布日期 1991.10.16
申请号 EP19910101762 申请日期 1991.02.08
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 MIYAMOTO, KOJI, C/O INTELLECTUAL PROPERTY DIVISION
分类号 H01L21/8247;H01L21/31;H01L23/29;H01L23/532;H01L27/115;H01L29/78;H01L29/788;H01L29/792;(IPC1-7):H01L23/485 主分类号 H01L21/8247
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